
IRS25091SPbF
Shut down Input
The IRS25091 is equipped with a shut down (DT/SD) input pin that is used to shutdown or enable the HVIC. When the DT/SD pin is
in the low state the HVIC is able to operate normally. When the DT/SD pin is in the high state the HVIC is tri-stated.
50%
50%
IN
90%
HO
LO
DT LO-HO
90%
10%
DT HO-LO
10%
MDT = DT LO-HO
- DT HO-LO
Figure 5: Shut down
Figure 6: Dead time Definition
Figure 7: Delay Matching waveform Definition
Input Logic Compatibility
The inputs of this IC are compatible with standard CMOS and TTL outputs. The IRS25091 has been designed to be compatible with
3.3 V and 5 V logic-level signals. Figure 8 illustrates an input signal to the IRS25091, its input threshold values, and the logic state of
the IC as a result of the input signal.
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